端口映射（port map）
端口映射用來定義實例間的內部連接。 A port map is used to define the interconnection between instances.
語法（Syntax）
port map ( [ 端口名 => ] 設定值, ... )port map ( [ port_name => ] exPRession, ... )說明（Description）
端口映射將結構體中的信號映射到結構體中的實例端口。端口映射在塊或者配置中也會出現。 A port map maps signals in an architecture to ports on an instance within that architecture. Port maps can also appear in a block or in a configuration.
連接是位置性關聯或者指定的關聯。 The connections can be listed via positional association or via named association.
在實例中，端口名是指元件端口或者例化的實體端口，設定值為包含了改實例的結構體中可見的信號。在配置中，端口名為實體的端口，設定值為元件的端口。 Within an instance, the port names are ports on the component or entity being instanced, the expressions are signals visible in the architecture containing the instance. Within a configuration, the port names are ports on the entity, the expressions are ports on the component.
使用指定的關聯可以單獨對端口組中的元素進行連接。 The elements of an array port can be connected individually when using named association.
使用關鍵字open可以使端口保留未連接狀態。 Ports may be left unconnected using the keyWord open.
例程（Example）
architecture Structure of Top is component CompA generic (...); port (Clk, Rst: in std_logic; D: in std_logic_vector(3 downto 0); Rd : out std_logic; Q: out std_logic_vector(3 downto 0)); end component;begin u1: CompA generic map(...) port map(Clock, Reset, DIn, QOut); u2: CompA generic map(...) port map(Clk => Clock, Rst => Reset, D => DIn, Rd => open, Q(0) => QOut1, Q(3 downto 1) => QOut2);end Structure;注釋（Notes）
端口映射里的轉換函數僅能有一個參數 A conversion function in a port map must have one parameter only.新聞熱點
疑難解答
